Fix dynamic crystal frequency detection based on board revision

9 years ago · 975f2d00af
parent 85f965eaa0
commit 975f2d00af
2 changed files with 2 additions and 2 deletions
--- a/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c
+++ b/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c
@ -1021,7 +1021,7 @@ __weak uint32_t HAL_RCC_GetSysClockFreq(void)
      if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
      {
        /* HSE used as PLL clock source */
-        pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
+        pllvco = (((HAL_GetHSECrystalFreqMHz() * (uint32_t)1000000) / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
      }
      else
      {
--- a/Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c
+++ b/Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c
@ -982,7 +982,7 @@ uint32_t HAL_RCC_GetSysClockFreq(void)
      if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
      {
        /* HSE used as PLL clock source */
-        pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
+        pllvco = (((HAL_GetHSECrystalFreqMHz() * (uint32_t)1000000) / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN)));
      }
      else
      {