6 Commits (2e3293e84f788849b0c22435129e9f78d1297e68)

Author	SHA1	Message	Date
Robert Fisk	2e3293e84f	Increase SPI interface speed 4x, to 5.25Mbps. Required modifications to ... SPI peripheral library. At this speed SPI requires ~60% CPU time at -Og optimisation level. This could be further improved by trimming down the SPI interrupt. But... Speed is now limited by Downstream's single-packet-per-URB restriction, to about 460kB/s. USB Middleware does not implement TX FIFO empty interrupt, so a bit of work is required here.	10 years ago
Robert Fisk	b9cc31d036	Crazy hardware issues, about to revert Upstream SPI from DMA to ... interrupt transfers	10 years ago
Robert Fisk	674cb621a7	Initial implementation of Downstream SPI interface and state machine.	10 years ago
Robert Fisk	7b4e4b3c14	Continued polishing work on Downstream project.	10 years ago
Robert Fisk	503d79de56	Streamlining Downstream project	10 years ago
Robert Fisk	55c8a21aad	Initial commit of Downstream template project.	10 years ago