i2c_keyboard update

master
Ivan Olenichev 6 years ago
parent 30be8cf4ca
commit 439bcf8f35

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

@ -15,13 +15,13 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
// 7 - 256 tacts or 21 mks, other values have no guaranties
parameter ONE_CALC_TIME_POW = 4; // 3 - 16 tacts or 1.3 mks, 4 - 32 tacts or 2.7 mks, 5 - 64 tacts or 5.3 mks, 6 - 128 tacts or 10.7 mks
// ONE_ROW_TIME_POW > (ONE_CALC_TIME_POW - 3); ONE_CALC_TIME_POW > 2 (if 2 or smaller, top module overrun may occur)
parameter CHATTERING_SUPRESSION_TIME = 100;
parameter CHATTERING_SUPRESSION_TIME = 5;
reg [ONE_ROW_TIME_POW:0] row_time = 0;
reg [3:0] row_counter;
//reg [7:0] temp;
//reg [7:0] i;
reg [4:0] i;
//reg [7:0] report [6:0]; // NO BYTE 2
//reg [7:0] report_byte;
@ -38,19 +38,15 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
assign kbd_code [2:0] = row_time[10:8]; // COLUMN NUM
assign kbd_code [6:3] = row_counter; // ROW NUM
wire [7:0] kbd_code_hid;
wire [7:0] kbd_code_hid_fn;
reg is_pressed;
reg last_wr;
reg [8:0] last_adr;
wire [7:0] last_column;
//reg [3:0] init_delay_cnt;
//reg [8:0] init_ram_cnt;
reg IS_RAM_INIT = 0;
/*always @ (negedge CLK) begin
COLUMN_SHADOW <= COLUMNS;
end*/
wire [7:0] report_data_rd;
reg [3:0] report_adress_rd;
reg [7:0] report_data_wr;
@ -116,35 +112,47 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
row_time = 0;
row_counter = row_counter + 1;
COLUMN_SHADOW <= COLUMNS; // LATCH STATE OF THE COLUMNS IN CURRENT ROW
//last_adr = 0;
last_adr = 0;
is_ghost = 0;
end
else begin
if (row_time == 0) begin//== ONE_ROW_TIME) begin
last_wr = 0;
ROWS_EN = 1 << ((row_counter+1) & 15);
last_adr = row_counter;
//last_adr = row_counter;
end
row_time = row_time + 1;
end
if ((row_time[ONE_ROW_TIME_POW:11] == 0) && (row_time[7:0] < 140)) begin
// if (COLUMN_SHADOW [row_time [10:8]] == 0) begin // START OF KEY PRESS PROCESSING
// if (row_time [7:0] == 0) // AT START OF EACH COLUMN PROCESS
// is_ghost = 0;
// end
// else begin
if (COLUMN_SHADOW [row_time [10:8]] == 0) begin
if (row_time [7] == 0) begin
is_ghost = 0;
if (row_time[2:0] == 0)
last_adr = row_time[6:3];
else if (row_time[2:0] == 1) begin
// if (last_adr != row_counter) begin
// if ((COLUMN_SHADOW != (1<<(row_time[10:8]))) && (last_column[row_time[10:8]] == 0))
// is_ghost = 1;
// end
for (i = 0; i < 8; i = i + 1) begin
if ((i != row_time [10:8]) && (last_adr != row_counter)) begin
if ((last_column[row_time[10:8]] == 0) && (COLUMN_SHADOW[i] == 0))
is_ghost = 1;
end
end
end
// is_ghost = 0;
// if ((row_counter != last_adr) && (row_time[10:8] != row_time[2:0])) begin // CHECK THAT COLUMNS AND ROWS ARE NOT THE SAME
// if ((last_column[row_time[10:8]] == 0) && (COLUMN_SHADOW[row_time[2:0]] == 0))// && (last_column[row_time[2:0]] == 0))
// is_ghost = 1;
// end
// if (row_time [2:0] == 7) // AT THE END OF EACH CHECKED ROW
// last_adr = last_adr + 1;//(row_time[6:3] + 1) & 15; // SET NEXT LAST COLUMN STATE ADRESS
end
else if (row_time [6:0] == 0)
last_adr = row_counter;
else if ((row_time [6:0] == 1) && (is_ghost == 0)) begin
// if (last_column[row_time[10:8]] == 1) begin
// is_pressed = 1;
// report_adress_rd = 2; // ADRESS TO MODIFIERS
// isr_internal = 1; // INTERNAL ISR AT NEXT TACT
// end
if (tmr_from_ram < CHATTERING_SUPRESSION_TIME)
tmr_to_ram = tmr_from_ram + 1;
else if (tmr_from_ram == CHATTERING_SUPRESSION_TIME) begin
@ -156,6 +164,8 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
else
tmr_to_ram = tmr_from_ram;
end
else if ((row_time [6:0] == 1) && (is_ghost == 1))
tmr_to_ram = tmr_from_ram;
end
else begin
last_adr = row_counter;
@ -169,27 +179,6 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
end
end
// last_adr = row_counter;
// if (row_time[7:0] == 128) begin
// if (COLUMN_SHADOW[row_time[10:8]] != last_column[row_time[10:8]]) begin
// if ((COLUMN_SHADOW[row_time[10:8]] == 0) && (last_column[row_time[10:8]] == 1)) is_pressed = 1;
// else is_pressed = 0;
// isr_internal = 1; // INTERNAL ISR AT NEXT TACT
// report_adress_rd = 2; // ADRESS TO MODIFIERS
// end
// end
// if (row_time[7:0] == 130)
// tmr_wr_en = 1;
// else if (row_time[7:0] == 132)
// tmr_wr_en = 0;
//
// if (row_time[10:8] == 7) begin
// if (row_time[7:0] == 130)
// last_wr = 1;
// else if (row_time[7:0] == 132)
// last_wr = 0;
// end
end
else if ((row_time[ONE_ROW_TIME_POW:11] == 0) && (row_time[7:0] == 250)) begin
@ -203,15 +192,6 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
last_wr = 0;
end
// if ((row_time[ONE_ROW_TIME_POW:8] == 1/*((1<<(ONE_ROW_TIME_POW-7))-1)*/) && (row_time[4:0] == 0)) begin
// //if (row_time[7:5] == 0) begin
// // temp = last_column;
// //end
// check_column (row_time[7:5]);
// if (row_time[7:5] == 7)
// last_wr = 1;
// end
// START PACK I2C_HID REPORT
else if ((isr_internal == 1)/* && (row_time[4:0] > 1)*/) begin
@ -275,21 +255,6 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
end
end
task check_column;
input [2:0] column;
begin
if (COLUMN_SHADOW[column] != last_column[column]) begin
//kbd_code = row_counter*8 + column;
if ((COLUMN_SHADOW[column] == 0) && (last_column[column] == 1)) is_pressed = 1;
else is_pressed = 0;
isr_internal = 1; // INTERNAL ISR AT NEXT TACT
report_adress_rd = 2; // ADRESS TO MODIFIERS
end
//else kbd_code = 255;
//temp[column] = COLUMN_SHADOW[column];
end
endtask
assign INT = isr;
SB_RAM40_4K #(
@ -318,6 +283,32 @@ module matrix_kbd ( input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inp
.WE(1'b0)
);
SB_RAM40_4K #(
.INIT_0(256'h0062_005D_0049_0045_0060_005A_0054_004F__0052_0000_004A_004D_0057_0058_0048_0050), // ROW 0-1
.INIT_1(256'h0063_005E_004B_004E_0061_005B_0055_0056__0000_005C_004C_0044_005F_0059_0053_0051), // ROW 2-3
.INIT_2(256'h0029_002B_0035_001E_0014_0004_001D_0000__00E2_0000_0000_0046_0047_0000_0000_00E6), // ROW 4-5
.INIT_3(256'h0000_00E1_0000_0000_0000_00E1_00E5_0000__0000_0000_00E0_0000_0000_0000_00E4_0000), // ROW 6-7
.INIT_4(256'h003E_002A_0042_0043_0000_0031_0028_002C__0034_002F_002D_0027_0013_0033_0000_0038), // ROW 8-9
.INIT_5(256'h0000_0040_0041_0026_0012_000F_0037_0000__003F_0030_002E_0025_000C_000E_0036_0000), // ROW 10-11
.INIT_6(256'h0000_0039_003A_001F_001A_0016_001B_0000__000B_001C_0023_0024_0018_000D_0010_0011), // ROW 12-13
.INIT_7(256'h000A_0017_0022_0021_0015_0009_0019_0005__003D_003C_003B_0020_0008_0007_0006_0000), // ROW 14-15
//.INIT_8(256'h0000_0000_0000_0000_002C_002A_0019_003B__0000_0000_0000_0000_00E2_0015_0006_003A), // ROW 16-17
//.INIT_9(256'h0000_0000_0000_0000_002C_002A_0019_003B__0000_0000_0000_0000_00E2_0015_0006_003A), // ROW 18-19
.WRITE_MODE(1),
.READ_MODE(1)
) kbd_codes_fn (
.RDATA(kbd_code_hid_fn),
.RADDR(kbd_code),
.RCLK(CLK),
.RCLKE(1'b1),
.RE(1'b1),
.WADDR(8'b0),
.WCLK(1'b0),
.WCLKE(1'b0),
.WDATA(8'b0),
.WE(1'b0)
);
SB_IO #(
.PIN_TYPE(6'b 1010_01),
.PULLUP(1'b 0)

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