forksand
/
wasd-libre
1
0
Fork 0
Code Issues 5 Pull Requests Releases Wiki Activity

Update i2c_keyboard

Browse Source
master
Ivan Olenichev 6 years ago
parent 8897ae5ea0
commit df04ce9839
12 changed files with 31593 additions and 24609 deletions
Show Stats Download Patch File Download Diff File

BIN
i2c_keyboard/.sconsign.dblite
View File

Binary file not shown.

15605
i2c_keyboard/hardware.asc
View File

File diff suppressed because it is too large Load Diff

BIN
i2c_keyboard/hardware.bin
View File

Binary file not shown.

4416
i2c_keyboard/hardware.blif
View File

File diff suppressed because it is too large Load Diff

BIN
i2c_keyboard/i2c_kbd_alt.bin
View File

Binary file not shown.

4480
i2c_keyboard/i2c_kbd_alt.blif
View File

File diff suppressed because it is too large Load Diff

15696
i2c_keyboard/i2c_kbd_alt.ex
View File

File diff suppressed because it is too large Load Diff

15483
i2c_keyboard/i2c_kbd_alt.txt
View File

File diff suppressed because it is too large Load Diff

187
i2c_keyboard/matrix_kbd.v
Unescape View File

@ -1,4 +1,4 @@
module matrix_kbd (input CLK, input RESET, input FREEZE, inout [15:0] ROWS, input [7:0] COLUMNS, output [7:0] kbd_r0, kbd_r2, kbd_r3, kbd_r4, kbd_r5, kbd_r6, kbd_r7,/*output [63:0] kbd_report,*/ output INT); module matrix_kbd (input CLK, input RESET, input FREEZE, inout [15:0] ROWS, input [7:0] COLUMNS, output [7:0] kbd_r0, kbd_r2, kbd_r3, kbd_r4, kbd_r5, kbd_r6, kbd_r7, output INT);
// * - ESC (29), 7 - F1 (3A), 4 - F2 (3B), 1 - NUM_LOCK (53) // * - ESC (29), 7 - F1 (3A), 4 - F2 (3B), 1 - NUM_LOCK (53)
// 0 - CAPS LOCK (39), 8 - R (15), 5 - BACKSPACE (2A), 2 - ENTER (58) // 0 - CAPS LOCK (39), 8 - R (15), 5 - BACKSPACE (2A), 2 - ENTER (58)
@ -12,13 +12,10 @@ module matrix_kbd (input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inpu
reg [15:0] row_time = 0; reg [15:0] row_time = 0;
reg [3:0] row_counter; reg [3:0] row_counter;
//reg [7:0] last_data [3:0];//[31:0] last_data;
reg [7:0] temp; reg [7:0] temp;
reg [7:0] i; reg [7:0] i;
//reg [63:0] report;
reg [7:0] report [6:0]; // NO BYTE 2 reg [7:0] report [6:0]; // NO BYTE 2
//reg [5:0] report_free_place;
reg isr; reg isr;
reg [15:0] ROWS_EN = 0; reg [15:0] ROWS_EN = 0;
@ -34,20 +31,34 @@ module matrix_kbd (input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inpu
reg [8:0] ram_adr; reg [8:0] ram_adr;
wire [7:0] ram_rd; wire [7:0] ram_rd;
reg [8:0] init_ram_cnt;
always @ (negedge CLK) begin always @ (negedge CLK) begin
COLS_SHADOW <= COLUMNS; COLS_SHADOW <= COLUMNS;
end end
ram RAM (CLK, ram_wr, ram_adr, temp, ram_rd);//module ram(input clk, wen, input [8:0] addr, input [7:0] wdata, output [7:0] rdata); ram RAM (CLK, ram_wr, ram_adr, temp, ram_adr, ram_rd);//module ram(input clk, wen, input [8:0] addr, input [7:0] wdata, output [7:0] rdata);
always @ (posedge CLK) begin always @ (posedge CLK) begin
if (RESET == 0) begin if (RESET == 0) begin
//last_data <= 32'hFFFFFFFF; for (i = 0; i < 6; i = i + 1)
//report_free_place <= 6'h3F; report[i] = 0;
//report <= 0; isr = 0;
init_ram_cnt = 0;
end end
else begin else begin
if (FREEZE == 0) begin if (FREEZE == 0) begin
if (init_ram_cnt < 256) begin
ram_wr = 1;
ram_adr = init_ram_cnt;
temp = 255;
init_ram_cnt = init_ram_cnt + 1;
end
else if (init_ram_cnt == 256) begin
ram_wr = 0;
init_ram_cnt = init_ram_cnt + 1;
end
else begin
if (row_time == ONE_ROW_TIME) begin if (row_time == ONE_ROW_TIME) begin
ram_wr = 0; ram_wr = 0;
row_time <= 0; row_time <= 0;
@ -62,193 +73,82 @@ module matrix_kbd (input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inpu
temp = ram_rd; temp = ram_rd;
if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 7 + 1)) if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 7 + 1))
ram_wr = 1; ram_wr = 1;
if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 0/*0*/)) begin if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 0))
check_column (0); check_column (0);
/*if (COLS_SHADOW[0] != last_data[row_counter*4 + 0]) begin else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 2))
case (row_counter) 0: kbd_code = 8'h29; 1: kbd_code = 8'h53; 2: kbd_code = 8'h3A; 3: kbd_code = 8'h3B; // ESC, F1-F2, NUM LOCK
default: kbd_code = 1;
endcase
if ((COLS_SHADOW[0] == 0) && (last_data[row_counter*4 + 0] == 1)) is_pressed = 1;
else is_pressed = 0;
end
else kbd_code = 255;
last_data[row_counter*4 + 0] <= COLS_SHADOW[0];*/
end
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 2/*4*/)) begin
check_column (2); check_column (2);
end else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 1))
/*if (COLS_SHADOW[2] != last_data[row_counter*4 + 2]) begin
case (row_counter) 0: kbd_code = 8'h39; 1: kbd_code = 8'h58; 2: kbd_code = 8'h15; 3: kbd_code = 8'h2A; // CAPS LOCK, R, BACKSPACE, ENTER
default: kbd_code = 1;
endcase
if ((COLS_SHADOW[2] == 0) && (last_data[row_counter*4 + 2] == 1)) is_pressed = 1;
else is_pressed = 0;
end
else kbd_code = 0;
last_data[row_counter*4 + 2] <= COLS_SHADOW[2];
end*/
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 1/*2*/)) begin
check_column (1); check_column (1);
/* else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 3))
if (COLS_SHADOW[1] != last_data[row_counter*4 + 1]) begin
case (row_counter) 0: kbd_code = 8'hE1; 1: kbd_code = 8'h4C; 2: kbd_code = 8'h06; 3: kbd_code = 8'h19; // LEFT SHIFT, C, V, DELETE
default: kbd_code = 1;
endcase
if ((COLS_SHADOW[1] == 0) && (last_data[row_counter*4 + 1] == 1)) is_pressed = 1;
else is_pressed = 0;
end
else kbd_code = 255;
last_data[row_counter*4 + 1] <= COLS_SHADOW[1];*/
end
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 3/*6*/)) //begin
check_column (3); check_column (3);
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 4))
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 4/*6*/))
check_column (4); check_column (4);
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 5/*6*/)) else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 5))
check_column (5); check_column (5);
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 6/*6*/)) else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 6))
check_column (6); check_column (6);
else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 7/*6*/)) else if (row_time == (ROW_STT_PROCESS_TIME + ONE_COLUMN_PROCESS_TIME * 7))
check_column (7); check_column (7);
/*
if (COLS_SHADOW[3] != last_data[row_counter*4 + 3]) begin
case (row_counter) 0: kbd_code = 8'hE0; 1: kbd_code = 8'hE7; 2: kbd_code = 8'hE2; 3: kbd_code = 8'h2C; // LCTRL, LALT, SPACE, RGUI
default: kbd_code = 1;
endcase
if ((COLS_SHADOW[3] == 0) && (last_data[row_counter*4 + 3] == 1)) is_pressed = 1;
else is_pressed = 0;
end
else kbd_code = 255;
last_data[row_counter*4 + 3] <= COLS_SHADOW[3];
*/
//end
else else
kbd_code = 255; kbd_code = 255;
// START PACK I2C_HID REPORT // START PACK I2C_HID REPORT
if (kbd_code_hid != 0 /*kbd_code != 255*/) begin if (kbd_code_hid != 0) begin
isr = 1; if ((kbd_code_hid > 8'hDF) && (kbd_code_hid < 8'hE8)) begin
//report[15:8] <= 0;
//report[63:56] <= 0;
if ((kbd_code_hid > 8'hDF) && (kbd_code_hid < 8'hE8))/*((kbd_code > 8'hDF) && (kbd_code < 8'hE8))*/ begin
//kbd_code = kbd_code & 8'h07;
if (is_pressed) if (is_pressed)
//report [7:0] <= report [7:0] | (1<<(kbd_code_hid & 8'h07));//(1<<kbd_code); report [0] = report [0] | (1<<(kbd_code_hid & 8'h07));
report [0] = report [0] | (1<<(kbd_code_hid & 8'h07));//(1<<kbd_code);
else else
report [0] <= report [0] & (~(1<<(kbd_code_hid & 8'h07)));//(~(1<<kbd_code)); report [0] <= report [0] & (~(1<<(kbd_code_hid & 8'h07)));
//report [7:0] <= report [7:0] & (~(1<<(kbd_code_hid & 8'h07)));//(~(1<<kbd_code));
end end
else begin else begin
if (is_pressed) begin if (is_pressed) begin
/*for (i = 0; i < 4; i = i + 1) begin isr = 1;
if (report_free_place[i] == 1) begin
report [ ((i + 2) * 8 + 7) : ((i + 2) * 8 + 0)] <= kbd_code;
report_free_place[i] = 0;
is_pressed = 0; // NO ERROR DETECTED
end
end
if (report_free_place[0] == 1) begin
report [ ((0 + 2) * 8 + 7) : ((0 + 2) * 8 + 0)] <= kbd_code;
report_free_place[0] = 0;
end*/
if (report [ 1 ] == 0) if (report [ 1 ] == 0)
report [ 1 ] <= kbd_code_hid;//kbd_code; report [ 1 ] <= kbd_code_hid;
else if (report [ 2 ] == 0) else if (report [ 2 ] == 0)
report [ 2 ] <= kbd_code_hid;//kbd_code; report [ 2 ] <= kbd_code_hid;
else if (report [ 3 ] == 0) else if (report [ 3 ] == 0)
report [ 3 ] <= kbd_code_hid;//kbd_code; report [ 3 ] <= kbd_code_hid;
else if (report [ 4 ] == 0) else if (report [ 4 ] == 0)
report [ 4 ] <= kbd_code_hid;//kbd_code; report [ 4 ] <= kbd_code_hid;
else if (report [ 5 ] == 0) else if (report [ 5 ] == 0)
report [ 5 ] <= kbd_code_hid;//kbd_code; report [ 5 ] <= kbd_code_hid;
else if (report [ 6 ] == 0) else if (report [ 6 ] == 0)
report [ 6 ] <= kbd_code_hid;//kbd_code; report [ 6 ] <= kbd_code_hid;
/*if (report [ 23 : 16 ] == 0) else
report [ 23 : 16 ] <= kbd_code_hid;//kbd_code; isr = 0;
else if (report [ 31 : 24 ] == 0)
report [ 31 : 24 ] <= kbd_code_hid;//kbd_code;
else if (report [ 39 : 32 ] == 0)
report [ 39 : 32 ] <= kbd_code_hid;//kbd_code;
else if (report [ 47 : 40 ] == 0)
report [ 47 : 40 ] <= kbd_code_hid;//kbd_code;
else if (report [ 55 : 48 ] == 0)
report [ 55 : 48 ] <= kbd_code_hid;//kbd_code;
else if (report [ 63 : 56 ] == 0)
report [ 63 : 56 ] <= kbd_code_hid;//kbd_code;*/
end end
else begin else begin
for (i = 1; i < 7; i = i + 1) begin for (i = 1; i < 7; i = i + 1) begin
//if (report [ ((i + 2) * 8 + 7) : ((i + 2) * 8 + 0)] == kbd_code_hid/*kbd_code*/) begin
//report [ ((i + 2) * 8 + 7) : ((i + 2) * 8 + 0)] <= 0;
if (report [i] == kbd_code_hid/*kbd_code*/) begin if (report [i] == kbd_code_hid/*kbd_code*/) begin
report [i] <= 0; report [i] = 0;
//report_free_place[i] = 1; isr = 1;
end end
end end
end end
//if (kbd_code == 8'h2C) begin
//if (is_pressed)
// report [15:8] <= kbd_code;
//else
// report [15:8] <= 0;
//end
//else if (kbd_code == 1) begin
// if (is_pressed)
// report [23:16] <= kbd_code;
// else
// report [23:16] <= 0;
//end
end end
end // END OF KBD CODE SEND ALG end // END OF KBD CODE SEND ALG
else else
isr <= 0; isr <= 0;
/*if (kbd_code != 0) begin
if (is_pressed)
report [7:0] <= kbd_code;
else
report [7:0] <= 0;
end*/
end end
end end
end end
/*else if (row_time == (ONE_ROW_TIME/2 + 6)) begin
if (COLS_SHADOW[3] != last_data[row_counter*4 + 3]) begin
case (row_counter) 0: kbd_code = 8'hE0; 1: kbd_code = 8'hE7; 2: kbd_code = 8'hE2; 3: kbd_code = 8'h2C; // LCTRL, LALT, SPACE, RGUI
default: kbd_code = 1;
endcase
if ((COLS_SHADOW[3] == 0) && (last_data[row_counter*4 + 3] == 1)) is_pressed = 1;
else is_pressed = 0;
end end
else kbd_code = 0;
last_data[row_counter*4 + 3] <= COLS_SHADOW[3];
end*/
task check_column; //(input [2:0] column); task check_column;
input [2:0] column; input [2:0] column;
begin begin
//if (COLS_SHADOW[column] != last_data[row_counter][column]/*[row_counter*8 + column]*/) begin
if (COLS_SHADOW[column] != temp[column]) begin if (COLS_SHADOW[column] != temp[column]) begin
kbd_code = row_counter*8 + column; kbd_code = row_counter*8 + column;
//if ((COLS_SHADOW[column] == 0) && (last_data[row_counter][column]/*[row_counter*8 + column]*/ == 1)) is_pressed = 1;
if ((COLS_SHADOW[column] == 0) && (temp[column] == 1)) is_pressed = 1; if ((COLS_SHADOW[column] == 0) && (temp[column] == 1)) is_pressed = 1;
else is_pressed = 0; else is_pressed = 0;
end end
else kbd_code = 255; else kbd_code = 255;
//last_data[row_counter][column]/*[row_counter*8 + column]*/ <= COLS_SHADOW[column];
temp[column] = COLS_SHADOW[column]; temp[column] = COLS_SHADOW[column];
end end
endtask endtask
//assign kbd_report = report;
assign kbd_r0 = report[0]; assign kbd_r0 = report[0];
assign kbd_r2 = report[1]; assign kbd_r2 = report[1];
assign kbd_r3 = report[2]; assign kbd_r3 = report[2];
@ -257,7 +157,6 @@ module matrix_kbd (input CLK, input RESET, input FREEZE, inout [15:0] ROWS, inpu
assign kbd_r6 = report[5]; assign kbd_r6 = report[5];
assign kbd_r7 = report[6]; assign kbd_r7 = report[6];
assign INT = isr; assign INT = isr;
//assign ROWS_EN = (1 << row_counter);
SB_RAM40_4K #( SB_RAM40_4K #(
.INIT_0(256'h0000_0001_0001_0001_00E7_0058_004C_0053__0001_0001_0001_0001_00E0_0039_00E1_0029), // ROW 0-1 .INIT_0(256'h0000_0001_0001_0001_00E7_0058_004C_0053__0001_0001_0001_0001_00E0_0039_00E1_0029), // ROW 0-1

15
i2c_keyboard/ram.v
Unescape View File

@ -1,4 +1,4 @@
module ram(input clk, wen, input [8:0] addr, input [7:0] wdata, output [7:0] rdata); module ram(input clk, wen, input [8:0] waddr, input [7:0] wdata, input [8:0] raddr, output [7:0] rdata);
reg [7:0] mem [0:255]; reg [7:0] mem [0:255];
reg [7:0] r_data; reg [7:0] r_data;
reg [7:0] w_data; reg [7:0] w_data;
@ -6,13 +6,14 @@ module ram(input clk, wen, input [8:0] addr, input [7:0] wdata, output [7:0] rda
reg last_we; reg last_we;
initial mem[0] = 255; initial mem[0] = 255;
always @(posedge clk) begin always @(posedge clk) begin
if ((last_we == 0) && (wen == 1)) begin if (wen) begin //((last_we == 0) && (wen == 1)) begin
w_data = wdata; //w_data = wdata;
w_addr = addr; //w_addr = addr;
mem[w_addr] <= w_data; //mem[w_addr] <= w_data;
mem[waddr] <= wdata;
end end
r_data <= mem[addr]; r_data <= mem[raddr];
last_we = wen; //last_we = wen;
end end
assign rdata = r_data; assign rdata = r_data;

228
i2c_keyboard/top.v
Unescape View File

@ -12,8 +12,7 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
//reg [7:0] I2C_TX; // TRANSMITTED TO MASTER //reg [7:0] I2C_TX; // TRANSMITTED TO MASTER
wire [7:0] I2C_TX; wire [7:0] I2C_TX;
reg [7:0] I2C_TX_DESC; reg [7:0] I2C_TX_DESC;
reg [7:0] I2C_TX_REPORT; //reg [7:0] I2C_TX_REPORT;
assign I2C_TX = (I2C_TX_DESC & I2C_OUT_DESC_MASK) | (I2C_TX_REPORT & (~I2C_OUT_DESC_MASK));
wire [7:0] I2C_RX; // RECEIVED FROM MASTER wire [7:0] I2C_RX; // RECEIVED FROM MASTER
wire I2C_TRANS, I2C_READ, I2C_ACK, I2C_ACK_MSTR_CTRL, I2C_WR; wire I2C_TRANS, I2C_READ, I2C_ACK, I2C_ACK_MSTR_CTRL, I2C_WR;
wire [7:0] I2C_COUNTER; wire [7:0] I2C_COUNTER;
@ -32,14 +31,26 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
wire [7:0] kbd_report [6:0]; wire [7:0] kbd_report [6:0];
wire ISR; wire ISR;
reg INT = 1; // INTERRUPT LINE TO HOST reg INT = 1; // INTERRUPT LINE TO HOST
reg [19:0] int_tmr;
reg KBD_FREEZE = 1; // LOGIC REG FOR BLOCK KBD ACTIVITY WHEN I2C IS WORKING reg KBD_FREEZE = 1; // LOGIC REG FOR BLOCK KBD ACTIVITY WHEN I2C IS WORKING
//reg IS_EMPTY_REPORT = 0; // REGISTER FOR CORRECT START (HOST MUST REQUEST EMPTY REGISTER AFTER INTERRUPT. THEN INTERRRUPT SET TO 1) //reg IS_EMPTY_REPORT = 0; // REGISTER FOR CORRECT START (HOST MUST REQUEST EMPTY REGISTER AFTER INTERRUPT. THEN INTERRRUPT SET TO 1)
matrix_kbd KEYBOARD (CLK, RESET, 0 /*KBD_FREEZE*/, KBD_ROWS, KBD_COLUMNS, kbd_report[0], kbd_report[1], kbd_report[2], kbd_report[3], kbd_report[4], kbd_report[5], kbd_report[6], ISR); matrix_kbd KEYBOARD (CLK, RESET, 0 /*KBD_FREEZE*/, KBD_ROWS, KBD_COLUMNS, kbd_report[0], kbd_report[1], kbd_report[2], kbd_report[3], kbd_report[4], kbd_report[5], kbd_report[6], ISR);
descriptors I2C_HID_DESC (CLK, RESET, I2C_WR, I2C_OUTPUT_TYPE[1:0], I2C_COUNTER, I2C_TX_DESC/*, kbd_report*/); descriptors I2C_HID_DESC (CLK, RESET, I2C_WR, I2C_OUTPUT_TYPE[1:0], I2C_COUNTER, I2C_TX_DESC/*, kbd_report*/);
parameter MAX_INPUT_LEN = 10; //reg [7:0] ring_report [(8*8-1):0];
reg [7:0] I2C_INPUT_DATA [MAX_INPUT_LEN:0]; reg [7:0] init_ram_cnt;
reg [3:0] ring_wr, ring_rd;
reg [3:0] wr_cnt;
reg report_wr_en;
reg [7:0] report_data_wadr, report_data_radr, report_data_wr;
wire [7:0] report_data_rd;
ram REPORT_DATA (CLK, report_wr_en, report_data_wadr, report_data_wr, report_data_radr, report_data_rd);
assign I2C_TX = (I2C_TX_DESC & I2C_OUT_DESC_MASK) | (/*I2C_TX_REPORT*/report_data_rd & (~I2C_OUT_DESC_MASK));
//parameter MAX_INPUT_LEN = 10;
//reg [7:0] I2C_INPUT_DATA [MAX_INPUT_LEN:0];
reg [7:0] temp_output_report; reg [7:0] temp_output_report;
reg [3:0] i2c_input_data_type; // 0 - UNKNOWN, 1 - I2C_HID_DESC_REQUEST, 2 - HID_REPORT_DESC_REQUEST, 3 - INPUT_REPORT_REQUEST, 4 - OUTPUT_REPORT_SET reg [3:0] i2c_input_data_type; // 0 - UNKNOWN, 1 - I2C_HID_DESC_REQUEST, 2 - HID_REPORT_DESC_REQUEST, 3 - INPUT_REPORT_REQUEST, 4 - OUTPUT_REPORT_SET
// 5 - RESET, 6 - GET_INPUT_REPORT, 7 - SET_OUTPUT_REPORT // 5 - RESET, 6 - GET_INPUT_REPORT, 7 - SET_OUTPUT_REPORT
@ -48,9 +59,6 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
reg [7:0] I2C_OUT_DESC_MASK = 0; reg [7:0] I2C_OUT_DESC_MASK = 0;
reg [7:0] KBD_LED_STATUS = 0; reg [7:0] KBD_LED_STATUS = 0;
reg [7:0] ring_report [(8*8-1):0];
reg [2:0] ring_wr, ring_rd;
reg [2:0] wr_cnt;
reg last_wr = 0, last_trans = 0, last_uart_active = 0, last_isr = 0, uart_double_ff = 0; reg last_wr = 0, last_trans = 0, last_uart_active = 0, last_isr = 0, uart_double_ff = 0;
@ -59,26 +67,68 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
// RESET LOGIC // RESET LOGIC
rststate <= rststate + !RESET; rststate <= rststate + !RESET;
if (RESET == 0) begin if (RESET == 0) begin
I2C_OUTPUT_TYPE = 0; I2C_OUTPUT_TYPE = 3;//0;
I2C_OUT_DESC_MASK = 0; I2C_OUT_DESC_MASK = 0;
KBD_LED_STATUS = 7; // BIT 0 - NUM LOCK, BIT 1 - CAPS LOCK, BIT 2 - SCROOL LOCK KBD_LED_STATUS = 5; // BIT 0 - NUM LOCK, BIT 1 - CAPS LOCK, BIT 2 - SCROOL LOCK
uart_double_ff = 0; last_trans = 0; last_uart_active = 0; last_isr = 0;
I2C_INPUT_LEN = 0; I2C_INPUT_LEN = 0;
INT = 0; INT = 1; int_tmr = 0;
UART_WR = 0; UART_WR = 0;
//KBD_FREEZE = 1; ring_wr = 0; ring_rd = 15; wr_cnt = 0;
//IS_EMPTY_REPORT = 0; init_ram_cnt = 0;
ring_wr = 0;
ring_rd = 0;
wr_cnt = 0;
end end
// NOT RESET MODE LOGIC // NOT RESET MODE LOGIC
else begin else begin
if ((last_wr == 0) && (I2C_WR == 1)) begin // I2C NEW BYTE TX/RX if (init_ram_cnt < 170) begin
report_wr_en = 1;
if (init_ram_cnt < 10)
report_data_wadr = 0;
else
report_data_wadr = init_ram_cnt - 10;
report_data_wr = 0;//report_data_adr + 1;
init_ram_cnt = init_ram_cnt + 1;
end
else if (init_ram_cnt == 170) begin
report_wr_en = 0;
init_ram_cnt = init_ram_cnt + 1;
end
else if ((last_isr == 0) && (ISR == 1)/* && (INT == 1)*/) begin // INTERRUPT FROM KEYBOARD
if ((ring_wr + 1) != ring_rd)
ring_wr = ring_wr + 1;
report_wr_en = 1;
report_data_wadr = ring_wr * 10;
report_data_wr = 10;//kbd_report [0];
wr_cnt = 1;
INT = 0;
I2C_OUTPUT_TYPE = 3;
I2C_OUT_DESC_MASK = 8'h00;
last_isr = ISR;
end
else if ((last_isr == 1) && (ISR == 0))
last_isr = ISR;
else if (wr_cnt != 0) begin
if (wr_cnt == 10) begin
wr_cnt = 0;
report_wr_en = 0;
end
else begin
report_data_wadr = ring_wr * 10 + wr_cnt;
if ((wr_cnt == 1) || (wr_cnt == 3))
report_data_wr = 0;
else if (wr_cnt == 2)
report_data_wr = kbd_report [wr_cnt - 2];
else
report_data_wr = kbd_report [wr_cnt - 3];
wr_cnt = wr_cnt + 1;
end
end
else if ((last_wr == 0) && (I2C_WR == 1)) begin // I2C NEW BYTE TX/RX
I2C_INPUT_LEN = I2C_COUNTER - 1; I2C_INPUT_LEN = I2C_COUNTER - 1;
if (I2C_READ == 0) begin if (I2C_READ == 0) begin // I2C_FROM_HOST
/*if (I2C_COUNTER < (MAX_INPUT_LEN + 2))
I2C_INPUT_DATA[I2C_COUNTER - 2] <= I2C_RX;*/
if (I2C_COUNTER == 2) begin if (I2C_COUNTER == 2) begin
if ((I2C_RX > 5) || (I2C_RX < 1)) if ((I2C_RX > 5) || (I2C_RX < 1))
@ -116,39 +166,55 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
end end
end end
else begin
else begin // I2C_TO_HOST
if (I2C_OUTPUT_TYPE == 3) begin if (I2C_OUTPUT_TYPE == 3) begin
if ((I2C_COUNTER < 2) || (I2C_COUNTER > (2 + 10 - 1))) //if ((I2C_COUNTER < 2) || (I2C_COUNTER > (2 + 10 - 1)))
I2C_TX_REPORT <= 0; // I2C_TX_REPORT <= 0;
else if (I2C_COUNTER == 2) /*else */if (I2C_COUNTER == 2) begin
I2C_TX_REPORT <= 10; if (ring_rd != ring_wr)
else if ((I2C_COUNTER == 3) || (I2C_COUNTER == 5)) ring_rd = ring_rd + 1;
I2C_TX_REPORT <= 0; report_data_radr = ring_rd * 10;
else if (I2C_COUNTER == 4)
I2C_TX_REPORT <= kbd_report[0];
else
I2C_TX_REPORT <= kbd_report[I2C_COUNTER - 5];
//I2C_TX_REPORT <= kbd_report[ (8 * (I2C_COUNTER - 4) + 7) : (8 * (I2C_COUNTER - 4) + 0) ];
end end
else else
I2C_TX_REPORT <= 0; report_data_radr = report_data_radr + 1;
//else if (I2C_COUNTER == 2)
// I2C_TX_REPORT <= 10;
//else if ((I2C_COUNTER == 3) || (I2C_COUNTER == 5)) begin
// I2C_TX_REPORT <= 0;
// if (ring_rd != ring_wr)
// ring_rd = ring_rd + 1;
// report_data_radr = ring_rd * 10;
//end
/*else if (I2C_COUNTER == 4)
I2C_TX_REPORT <= kbd_report[0];*/
//else begin
// I2C_TX_REPORT = report_data_rd;
// report_data_radr = report_data_radr + 1;
//I2C_TX_REPORT <= kbd_report[I2C_COUNTER - 5];
//end
end
//else
// I2C_TX_REPORT <= 0;
end end
last_wr = I2C_WR;
end // I2C NEW BYTE TX/RX - END end // I2C NEW BYTE TX/RX - END
else if ((last_wr == 1) && (I2C_WR == 0)) begin // I2C_NEW_BYTE_NEGEDGE_FOR_UART else if ((last_wr == 1) && (I2C_WR == 0)) begin // I2C_NEW_BYTE_NEGEDGE_FOR_UART
UART_WR <= 1; UART_WR = 1;
if (I2C_READ == 0) if (I2C_READ == 0)
UART_TX_DATA <= I2C_RX; UART_TX_DATA = I2C_RX;
else else
UART_TX_DATA <= I2C_TX; UART_TX_DATA = I2C_TX;
last_wr = I2C_WR;
end // I2C_NEW_BYTE_NEGEDGE_FOR_UART - END end // I2C_NEW_BYTE_NEGEDGE_FOR_UART - END
else if ((last_trans == 0) && (I2C_TRANS == 1)) begin // I2C_START_CONDITION OR REPEAT START (UART FF) else if ((last_trans == 0) && (I2C_TRANS == 1)) begin // I2C_START_CONDITION OR REPEAT START (UART FF)
i2c_input_data_type = 0; // UNKNOWN DATA IN i2c_input_data_type = 0; // UNKNOWN DATA IN
uart_double_ff = 1;
UART_TX_DATA = 8'hFF; UART_TX_DATA = 8'hFF;
UART_WR = 1; UART_WR = 1;
uart_double_ff = 1; last_trans = I2C_TRANS;
KBD_FREEZE = 0;
end // I2C_START_CONDITION (UART FF) - END end // I2C_START_CONDITION (UART FF) - END
else if ((last_trans == 1) && (I2C_TRANS == 0)) begin // I2C_STOP CONDITION (OR REPEAT START DETECTED) else if ((last_trans == 1) && (I2C_TRANS == 0)) begin // I2C_STOP CONDITION (OR REPEAT START DETECTED)
@ -164,82 +230,49 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
I2C_OUTPUT_TYPE = 3; I2C_OUTPUT_TYPE = 3;
else if (i2c_input_data_type == 5) else if (i2c_input_data_type == 5)
rststate <= 4'h0; // RESET COMMAND rststate <= 4'h0; // RESET COMMAND
/*if (I2C_INPUT_LEN == 0)
KBD_FREEZE <= 0;
else if (I2C_INPUT_LEN == 2) begin
if ((I2C_INPUT_DATA[0] == 1) && (I2C_INPUT_DATA[1] == 0)) // I2C_HID_DESC_REQUEST
I2C_OUTPUT_TYPE = 1;
else if ((I2C_INPUT_DATA[0] == 2) && (I2C_INPUT_DATA[1] == 0)) // HID REPORT DESC REQUEST
I2C_OUTPUT_TYPE = 2;
else if ((I2C_INPUT_DATA[0] == 3) && (I2C_INPUT_DATA[1] == 0)) // INPUT REPORT REQUEST (ADR)
I2C_OUTPUT_TYPE = 3;
//else
// I2C_OUTPUT_TYPE = 0; //
end
else if (I2C_INPUT_LEN == 5) begin // OUTPUT REPORT SET (LEDS) - WRITE TO OUT ADR
if ((I2C_INPUT_DATA[0] == 4) && (I2C_INPUT_DATA[1] == 0) && (I2C_INPUT_DATA[2] == 1) && (I2C_INPUT_DATA[3] == 0)) begin
KBD_LED_STATUS <= I2C_INPUT_DATA[4];
KBD_FREEZE <= 0;
end
//else
// I2C_OUTPUT_TYPE = 0; //
end
else if (I2C_INPUT_LEN == 6) begin // INPUT REPORT REQUEST (KBD PRESS INFO)
if ((I2C_INPUT_DATA[0] == 5) && (I2C_INPUT_DATA[1] == 0) && (I2C_INPUT_DATA[2] == 16) && (I2C_INPUT_DATA[3] == 2) && (I2C_INPUT_DATA[4] == 6) && (I2C_INPUT_DATA[5] == 0))
I2C_OUTPUT_TYPE = 3;
//else
// I2C_OUTPUT_TYPE = 0; //
end
else if (I2C_INPUT_LEN == 9) begin // OUTPUT REPORT SET (LEDS) - WRITE BY CMD
if ((I2C_INPUT_DATA[0] == 5) && (I2C_INPUT_DATA[1] == 0) && (I2C_INPUT_DATA[2] == 32) && (I2C_INPUT_DATA[3] == 3) && (I2C_INPUT_DATA[4] == 6) && (I2C_INPUT_DATA[5] == 0) /*&& (I2C_INPUT_DATA[6] == 1) && (I2C_INPUT_DATA[7] == 0)*//*) begin
KBD_LED_STATUS <= I2C_INPUT_DATA[8];
KBD_FREEZE <= 0;
end
//else
// I2C_OUTPUT_TYPE = 0; //
end
else if (I2C_INPUT_LEN == 4) begin
if ((I2C_INPUT_DATA[0] == 5) && (I2C_INPUT_DATA[1] == 0) && (I2C_INPUT_DATA[2] == 0) && (I2C_INPUT_DATA[3] == 1))
rststate <= 4'h0; // RESET COMMAND
end */
//else
// I2C_OUTPUT_TYPE = 0; //
if ((I2C_OUTPUT_TYPE == 1) || (I2C_OUTPUT_TYPE == 2)) if ((I2C_OUTPUT_TYPE == 1) || (I2C_OUTPUT_TYPE == 2))
I2C_OUT_DESC_MASK = 8'hFF; I2C_OUT_DESC_MASK = 8'hFF;
else else
I2C_OUT_DESC_MASK = 8'h00; I2C_OUT_DESC_MASK = 8'h00;
end // END OF I2C_READ == 0 end // END OF I2C_READ == 0
else begin else begin
//KBD_FREEZE <= 0; // UNFREEZING KBD AFTER ANYONE I2C RECEIVING if (((I2C_OUTPUT_TYPE == 3) /*|| (I2C_OUTPUT_TYPE == 0)*/) && (I2C_INPUT_LEN > 1)) begin
//if (((I2C_OUTPUT_TYPE == 3) && (I2C_INPUT_LEN == 10)) || ((I2C_OUTPUT_TYPE == 0) && (I2C_INPUT_LEN > 1))) begin // HARD
if (((I2C_OUTPUT_TYPE == 3) || (I2C_OUTPUT_TYPE == 0)) && (I2C_INPUT_LEN > 1)) begin // SOFT
// DEACTIVATING INTERRRUPT IF HOST READ INPUT REPORT (LEN 10) AFTER INTERRUPT OR EMPTY DATA (>=2 BYTES) AFTER RESET // DEACTIVATING INTERRRUPT IF HOST READ INPUT REPORT (LEN 10) AFTER INTERRUPT OR EMPTY DATA (>=2 BYTES) AFTER RESET
// AND UNFREEZING KEYBOARD //if (ring_rd == ring_wr)
INT <= 1; INT = 1;
//KBD_FREEZE <= 0; int_tmr = 0;
//IS_EMPTY_REPORT = 1;
//if (ring_rd != ring_wr)
// ring_rd = ring_rd + 1;
end end
I2C_OUTPUT_TYPE = 3;
I2C_OUT_DESC_MASK = 0;
end end
last_trans = I2C_TRANS;
end // I2C_STOP CONDITION (OR REPEAT START DETECTED) - END end // I2C_STOP CONDITION (OR REPEAT START DETECTED) - END
else if ((last_uart_active == 1) && (UART_ACTIVE == 0) && (uart_double_ff == 1)) begin else if ((last_uart_active == 1) && (UART_ACTIVE == 0)) begin
if (uart_double_ff == 1) begin
UART_WR = 1; UART_WR = 1;
UART_TX_DATA = 8'hFF; UART_TX_DATA = 8'hFF;
uart_double_ff = 0; uart_double_ff = 0;
I2C_INPUT_LEN = 0;
end end
last_uart_active = UART_ACTIVE;
end
else if ((last_uart_active == 0) && (UART_ACTIVE == 1))
last_uart_active = UART_ACTIVE;
else if (UART_WR == 1) else if (UART_WR == 1)
UART_WR <= 0; UART_WR = 0;
else if ((last_isr == 0) && (ISR == 1) && (INT == 1)) begin // INTERRUPT FROM KEYBOARD else if (int_tmr[19] != 1)
/*if ((ring_wr + 1) != ring_rd) int_tmr = int_tmr + 1;
ring_wr = ring_wr + 1;
ring_report[ring_wr * 8 + 0] <= kbd_report[ (8 * 0 + 7) : (8 * 0 + 0) ]; else if ((int_tmr[19] == 1) && (I2C_OUTPUT_TYPE == 3) && (I2C_TRANS == 0)) begin
wr_cnt = 1;*/ if (ring_rd != ring_wr)
INT = 0; INT = 0;
I2C_OUTPUT_TYPE = 3;
I2C_OUT_DESC_MASK = 8'h00;
end end
/*else if (wr_cnt != 0) begin /*else if (wr_cnt != 0) begin
ring_report[ring_wr * 8 + wr_cnt] <= kbd_report[ (8 * wr_cnt + 7) : (8 * wr_cnt + 0) ]; ring_report[ring_wr * 8 + wr_cnt] <= kbd_report[ (8 * wr_cnt + 7) : (8 * wr_cnt + 0) ];
@ -247,10 +280,7 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
// if (wr_cnt == 0) // START ISR // if (wr_cnt == 0) // START ISR
end*/ end*/
last_wr <= I2C_WR;
last_trans <= I2C_TRANS;
last_uart_active <= UART_ACTIVE;
last_isr <= ISR;
end end
end end
@ -262,6 +292,8 @@ module top (input CLK, output LED1, LED2, LED3, LED4, LED5,
assign LED2 = KBD_LED_STATUS[0]; assign LED2 = KBD_LED_STATUS[0];
assign LED3 = KBD_LED_STATUS[1]; assign LED3 = KBD_LED_STATUS[1];
assign LED4 = KBD_LED_STATUS[2];//KBD_FREEZE;//UART_ACTIVE; assign LED4 = KBD_LED_STATUS[2];//KBD_FREEZE;//UART_ACTIVE;
//assign LED3 = UART_ACTIVE;
//assign LED4 = uart_double_ff;
//assign ACK = I2C_READ;//I2C_WR; //I2C_ACK; //assign ACK = I2C_READ;//I2C_WR; //I2C_ACK;
assign COM_TX = UART_TX_LINE;//COM_RX; assign COM_TX = UART_TX_LINE;//COM_RX;

4
i2c_keyboard/uart.v
Unescape View File

@ -8,7 +8,9 @@ module uart ( input CLK, input RESET, input TX_SIGNAL, input [7:0] TX_BYTE,
// IF BYTE IS TRANSMITTING, ATTEMPT TO TRANSMIT OTHER BYTE HAS NO EFFECT // IF BYTE IS TRANSMITTING, ATTEMPT TO TRANSMIT OTHER BYTE HAS NO EFFECT
// MODULE WORKS AT POSEDGE // MODULE WORKS AT POSEDGE
parameter CLK_DIV = 13; parameter CLK_DIV = 13; // 921600
//parameter CLK_DIV = 5000; // 2400
//parameter CLK_DIV = 104; // 115200
reg TX_sig_last; reg TX_sig_last;
reg [3:0] tx_bit_counter; reg [3:0] tx_bit_counter;
reg [3:0] tx_clk_counter; // MUST CONTAIN CLK DIV reg [3:0] tx_clk_counter; // MUST CONTAIN CLK DIV

Write Preview
Loading…
Cancel
Save