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readme update

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davor 7 years ago
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README.md
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@ -155,3 +155,4 @@ Test the prototype.
[ ] route 16-channel ADC [ ] route 16-channel ADC
[x] move 8 LEDs a bit down and right [x] move 8 LEDs a bit down and right
[x] let SD_CLK go to FPGA clock capable pin: swap SD_CLK and SD_D2 pins [x] let SD_CLK go to FPGA clock capable pin: swap SD_CLK and SD_D2 pins
[ ] additional 2 differential lines for US2

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