readme update

7 years ago · 017c797154
parent 6cd951119f
commit 017c797154
1 changed files with 1 additions and 0 deletions
--- a/README.md
+++ b/README.md
@ -155,3 +155,4 @@ Test the prototype.
    [ ] route 16-channel ADC
    [x] move 8 LEDs a bit down and right
    [x] let SD_CLK go to FPGA clock capable pin: swap SD_CLK and SD_D2 pins 
+    [ ] additional 2 differential lines for US2