davor
|
6079a51257
|
schematics: symbol for SDRAM copied from rescue to proper library
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7 years ago |
davor
|
c1053dd7bd
|
schematics: cleanup of MFG_PN to simplify BOM
|
7 years ago |
davor
|
804ac1c309
|
schematics: Add some PN's for the BOM
|
7 years ago |
davor
|
6b50f65544
|
footprints: FPGA renaming Quad SPI lines D2,D3
schematics: reference FPGA footprint directly (not from rescue file)
|
7 years ago |
davor
|
e81d05b68d
|
schematics: renaming pins J..+- to GP,GN..
|
7 years ago |
davor
|
5b7c755ee1
|
schematics: flip audio 0-3
|
7 years ago |
davor
|
f4d7692c91
|
schematics: SD card symbol with 2 CD pins connected to GND
|
7 years ago |
davor
|
c87e9f6c4c
|
schematics: renumbering dipswitch pins to match writing on the
part, pins 1-4 from left to right
|
7 years ago |
Emard
|
3915779e0c
|
schematics: part numbers and URLs of datasheets and manufacturers
of most chips and connectors. Small parts not done yet.
|
7 years ago |
Emard
|
2b2420fe37
|
schematics: text labels that enumerate differential pairs on 2.54mm connector
|
7 years ago |
Emard
|
a5a51a8f28
|
connected missing SD card pins to esp-32
|
7 years ago |
Emard
|
cca17d282d
|
open-close to check that everything loads fine
|
7 years ago |
Emard
|
35b3a8b3dd
|
changing to 45F which is production device now
schem symbol 45F fixed typo T8->T7 (GND) and SERDES
|
7 years ago |
davor
|
050a70079a
|
move one audio-v pin from bank0 to bank7 so
now all audio jack pins are on bank7
|
7 years ago |
davor
|
0d71e508ae
|
analog: audio ring2 resistor DAC network connected to FPGA
copper infill is getting thin, so minimal-thickness traces
are used 0.127 mm
|
7 years ago |
Emard
|
ba4c8e8d22
|
PCB v1.6 SDRAM fully reworked
|
7 years ago |
davor
|
e4fc99887e
|
moving GND and VCC on schematics symbols to
common locations for planned PCB which
supports upgrade path for example
12F->25F->45F->85F and if possible ECP5U->ECP5UM
|
7 years ago |
Emard
|
07de158d38
|
R56 for FT231X rev A,B,C workaround from TN140_FT231X Errata
|
7 years ago |
davor
|
10df092413
|
using modified ECP5 footprint
|
7 years ago |
Emard
|
91ac1cc478
|
D8,D9,D51,D52: SMA package 2A low drop low profile
|
7 years ago |
davor
|
fdf38ad9a1
|
DIP switch moved to the right, near RAM.
Maybe should be moved more to the right not to overlap with OLED
|
7 years ago |
davor
|
236f63488a
|
DIP SWITCH routed
|
7 years ago |
davor
|
32836831ae
|
i2c of RTC connected to GPDI i2c
|
7 years ago |
davor
|
2153a220a0
|
schematic symbol for ADC MAX11123
small PCB traces cleanup
ADC chip placed on PCB but connected only to GND
|
7 years ago |
Emard
|
be09416928
|
Add 27 ohm resistors in series with FTDI USB and readme update
|
8 years ago |
Emard
|
ee7d266543
|
Resistors for LEDs
|
8 years ago |
davor
|
b7500cc477
|
increasing thickness of power traces, moving clock
to a bank which is always at 3.3V
|
8 years ago |
davor
|
2a60828a99
|
schem. pullup 1.5k for USB 1.1 full speed mode
|
8 years ago |
davor
|
dbf4b92a22
|
audio DAC routed
|
8 years ago |
davor
|
23b588ff16
|
Routing... 4 routes remaining
|
8 years ago |
davor
|
0f9d00f602
|
Buffer capacitor for SDRAM
|
8 years ago |
Emard
|
752eddee0e
|
J1 routed using only purple plane, (yellow plane made free)
|
8 years ago |
Emard
|
092e601af1
|
connecting LEDs
|
8 years ago |
Emard
|
e30bbeea40
|
routing 4 GPIO on J2
|
8 years ago |
Emard
|
48dc148919
|
manually routing J1 differential
|
8 years ago |
Davor
|
3446afcc08
|
optimizing PCB component placement
and audio bit ordering
|
8 years ago |
Davor
|
19b884baef
|
using corrected schem symbol, reordering pins
|
8 years ago |
Davor
|
39dce76f0a
|
use new schem symbol
|
8 years ago |
Davor
|
2cda80c3a8
|
manually routed few tracks of GPIO
|
8 years ago |
davor
|
70fb21781b
|
reorder GPDI differential pairs for almost straitforward routing
|
8 years ago |
Davor
|
aef3945a8e
|
differential pin naming for GPDI, USB, GPIO
|
8 years ago |
davor
|
c297a5294f
|
adding 25 MHz oscillator and moving some parts around
|
8 years ago |
Davor
|
12e89e677a
|
connecting wifi, usbserial, oled, sd card
|
8 years ago |
Davor
|
a477fbd050
|
connecting flash config chip
|
8 years ago |
davor
|
dc1ae11172
|
partially routed board using "freeroute" autorouter
|
8 years ago |
davor
|
85cb0b3f93
|
Placing 40-pin connectors side-by-side,
changing ft2232 to ft231x
|
8 years ago |
davor
|
a7de1a4e58
|
power button
|
8 years ago |
davor
|
a60712b2f6
|
place renumbered schematic units of the fpga chip
|
8 years ago |
davor
|
e2899667ef
|
place all available banks to gpio page
|
8 years ago |
davor
|
c3889467a0
|
rename gpio pins same as BGA pin e.g. A9, C11, ...
|
8 years ago |