1613 Commits (ab9aaef5196b5853de9f6570db37d1d4f86dd9d2)
 

Author SHA1 Message Date
davor dcc2d375ea routing additional pins to J2 GPIO. 2 differential pairs left to route
8 years ago
davor 9f0d9c46a7 routing half of J2 gpio
8 years ago
Emard e30bbeea40 routing 4 GPIO on J2
8 years ago
Emard 48dc148919 manually routing J1 differential
8 years ago
Emard 9050eefd6e update fill zone
8 years ago
Davor 55ecd6c1c2 update 3D view top
8 years ago
Davor 56e8ad2710 update 3D view pictures
8 years ago
Davor 3446afcc08 optimizing PCB component placement
8 years ago
Davor 19b884baef using corrected schem symbol, reordering pins
8 years ago
Davor a4b74230d3 fixing errors in schem symbol BANK6
8 years ago
Davor af58a36fbd delete old FPGA schem. symbol component from the library
8 years ago
Davor 39dce76f0a use new schem symbol
8 years ago
Davor e5f97e1897 schematic symbol FPGA: mark bank physical location
8 years ago
Davor 2cda80c3a8 manually routed few tracks of GPIO
8 years ago
Davor 8a53acb71a cleaning GPDI routes and moving OLED back in place
8 years ago
davor 70fb21781b reorder GPDI differential pairs for almost straitforward routing
8 years ago
davor 4a26254f9a correcting schematic symbol of FPGA
8 years ago
davor a8f1214b27 reorder SDRAM to FPGA connection for straightforward routing
8 years ago
davor 01d1cad2ec add missing pins in schematic symbol for BANK3
8 years ago
Davor 19c91e5c6b differential pair track thickness and spacing
8 years ago
Davor 632e5bd443 importing netlist with differential pairs named + -
8 years ago
Davor aef3945a8e differential pin naming for GPDI, USB, GPIO
8 years ago
Davor d0791b1e47 correcting few pin numbering errors in FPGA schematic symbols
8 years ago
Davor ec42a18d26 reordering RAM connections to use peripheral pins near SDRAM chip
8 years ago
Davor 40aef19979 FPGA schematic symbol add mssing PR41A, PR41B to BANK3
8 years ago
davor 53f11a6950 reducing track width to 0.19 mm to pass out of 2nd row of BGA
8 years ago
Davor 961755fc98 manual routing BGA power
8 years ago
Davor af042dfef0 manually routing BGA power
8 years ago
davor a1d25d9d24 create copper fill layers
8 years ago
davor d6fd30e59c jumper to disable wifi module
8 years ago
davor 38517df9f6 fine tuning via diameters and clearances
8 years ago
davor dd597e7b49 board production rules for oshpart
8 years ago
davor 1c5b8a64a3 use new footprint for crystal oscillator
8 years ago
davor 75e4f9b564 correct footprint for crystal oscillator 25 MHz
8 years ago
davor 508318d712 PCB moving 3.5mm DAC resistors below 3.5m jack, side-by-side
8 years ago
davor e9825a4105 enlarging the board for 7x2.54 mm to fit triple protoboard
8 years ago
davor 0af487f23c renaming clocks
8 years ago
davor 9570c1137b small edits
8 years ago
davor c297a5294f adding 25 MHz oscillator and moving some parts around
8 years ago
Davor f894f386df design rules, move to BGA netlist to route with thinner traces
8 years ago
Davor 12e89e677a connecting wifi, usbserial, oled, sd card
8 years ago
Davor 0ca9b4cb0e notify possible extra width of the board 7x2.54 mm
8 years ago
Davor 3e68526ccb it acutally routed but schematic is still incomplete :)
8 years ago
Davor 498701d2b4 gitignore intermediate files of freeroute
8 years ago
Davor 4a63816ba2 remove freeroute intermediate file
8 years ago
Davor ad0ae760b5 overnight run of freeroute routed much
8 years ago
Davor a477fbd050 connecting flash config chip
8 years ago
davor a8c293805f moving battery down,
8 years ago
davor dc1ae11172 partially routed board using "freeroute" autorouter
8 years ago
davor e37f17e390 moving PCB components around
8 years ago