cca17d282d
open-close to check that everything loads fine
7 years ago
35b3a8b3dd
changing to 45F which is production device now
...
schem symbol 45F fixed typo T8->T7 (GND) and SERDES
7 years ago
0d71e508ae
analog: audio ring2 resistor DAC network connected to FPGA
...
copper infill is getting thin, so minimal-thickness traces
are used 0.127 mm
7 years ago
f843d3169a
gpdi sheet, i2c voltage shifter, VREF filtering with C18 100nF->470nF
7 years ago
ba4c8e8d22
PCB v1.6 SDRAM fully reworked
7 years ago
eca6978391
HDMI fixed wrong wiring PCB v1.5
...
and improving copper fill areas
7 years ago
bc41b3052d
move WIFI disable jumper closer to BTN1
7 years ago
1ea88bda53
Adding pins to schematic symbols for all chips in unit "H" (SERDES)
...
Non-serdes chips need GND connection on unit "H".
"power" sheet now connects GND's at unit "H".
7 years ago
bc4b88ee58
Micro SD: using SCHD3A0100
7 years ago
f3d84dbfdc
LED D19 was oriented wrong, now correct
7 years ago
bab7ee607e
placeholder for 1.5k pullup for usb 1.0
7 years ago
9cc436ce8c
Additional VCC 2.2uF blocking capacitors near the switching
...
power supply to form PI-filter with another 2.2uF near BGA
7 years ago
bcf94bafab
buttons footprints correct now
7 years ago
236f63488a
DIP SWITCH routed
7 years ago
2153a220a0
schematic symbol for ADC MAX11123
...
small PCB traces cleanup
ADC chip placed on PCB but connected only to GND
7 years ago
81b3ea5da0
adding minimal set of 3 2.2uF capacitor for 1.2V, 2.5V and 3.3V
7 years ago
ee7d266543
Resistors for LEDs
7 years ago
18aef04f2c
JTAG header
7 years ago
23b588ff16
Routing... 4 routes remaining
7 years ago
1f60f95a71
compatible OLED models: SSD1306 or SSD1331
7 years ago
1e5e0b01a6
connecting JTAG lines to FTDI serial lines RI DCD CTS DSR
...
as those pins are by default inputs and can be reconfigured as outputs
similar but not identical pinout as the one that works from ujprog
CBUS used to force-wakeup of the board from sleep state
2 LEDs to CBUS pins to display usb enumeration and activity status
7 years ago
5e953da6b9
connecting required pins for WiFi programming
7 years ago
dcc2d375ea
routing additional pins to J2 GPIO. 2 differential pairs left to route
7 years ago
9f0d9c46a7
routing half of J2 gpio
7 years ago
e30bbeea40
routing 4 GPIO on J2
7 years ago
19b884baef
using corrected schem symbol, reordering pins
7 years ago
39dce76f0a
use new schem symbol
7 years ago
2cda80c3a8
manually routed few tracks of GPIO
7 years ago
70fb21781b
reorder GPDI differential pairs for almost straitforward routing
7 years ago
aef3945a8e
differential pin naming for GPDI, USB, GPIO
7 years ago
ec42a18d26
reordering RAM connections to use peripheral pins near SDRAM chip
7 years ago
d6fd30e59c
jumper to disable wifi module
7 years ago
1c5b8a64a3
use new footprint for crystal oscillator
7 years ago
0af487f23c
renaming clocks
7 years ago
9570c1137b
small edits
7 years ago
c297a5294f
adding 25 MHz oscillator and moving some parts around
7 years ago
a477fbd050
connecting flash config chip
7 years ago
dc1ae11172
partially routed board using "freeroute" autorouter
7 years ago
85cb0b3f93
Placing 40-pin connectors side-by-side,
...
changing ft2232 to ft231x
7 years ago
a7de1a4e58
power button
7 years ago
4f3fabdb5f
oled updated on the schematic and PCB
7 years ago
6639abded3
add 4 mounting holes
7 years ago
b661cacede
Change to 2x20 pin headers, PCB layout currently sub-optimal
7 years ago
f7185a0ff7
improving wifi SD and JTAG pinouts.
...
Unsure of JTAG (GPIO20 is NC on ESP-32S module?)
7 years ago
f9ba6fa20b
chage ESP8266-12E to ESP32S
...
approximate (maybe incorrect) connections - need review
(programming esp from fpga, jtag, sd, chip enable)
7 years ago
a0dae5bb6a
another diode to duscharge C14 at shutdown
7 years ago
cf01d5cc8d
Power: Replace discharge resistor which leaks with
...
a diode for discharge C at shutdown
HDMI pin 0 is now the shield and connected to GND
7 years ago
222f4805b3
SDRAM add global labels for signals
7 years ago
23c4cde741
GPDI I2C 5V level shifter
7 years ago
7fd0f561fc
Add SPI flash chip
7 years ago
Emard