Emard
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272eda6bb4
|
readme update
|
7 years ago |
|
Emard
|
78e4a8ddbb
|
readme update
|
7 years ago |
|
davor
|
017c797154
|
readme update
|
7 years ago |
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davor
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33440ee3fa
|
schematics, readme: swap SD_CLK and SD_D2 pins,
now SD_CLK is connected to clock capable FPGA pin
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7 years ago |
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davor
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f9985ae004
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readme update
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7 years ago |
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davor
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c86d41449f
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readme update
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7 years ago |
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davor
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62585a80c2
|
readme update
|
7 years ago |
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davor
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516eb333b7
|
readme update
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7 years ago |
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davor
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f4af631532
|
readme update
|
7 years ago |
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davor
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cdbf0bf69f
|
readme update
|
7 years ago |
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davor
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4cdd2f2853
|
readme update
|
7 years ago |
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davor
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34584d4156
|
readme update
|
7 years ago |
|
davor
|
448ac4f099
|
readme update
|
7 years ago |
|
davor
|
9fbc363beb
|
readme update
|
7 years ago |
|
davor
|
3fb38e47a1
|
readme update
|
7 years ago |
|
davor
|
7cd2e904a5
|
resolve merge conflict
|
7 years ago |
|
davor
|
87095ae784
|
readme and doc update
|
7 years ago |
|
Emard
|
0bdbc3e0b3
|
readme update
|
7 years ago |
|
Emard
|
cae9d9685d
|
readme update
|
7 years ago |
|
Emard
|
13bcf60f39
|
readme update
|
7 years ago |
|
Emard
|
0fefc8839a
|
readme update and some simple manual
|
7 years ago |
|
davor
|
0556de6498
|
readme update
|
7 years ago |
|
davor
|
1696f5c161
|
readme update
|
7 years ago |
|
davor
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aef5c59599
|
readme and upgrade update
|
7 years ago |
|
davor
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28a3c7019c
|
readme and upgrading update
|
7 years ago |
|
davor
|
c1cf614eb0
|
readme update
|
7 years ago |
|
davor
|
a81d5e5b35
|
readme update
|
7 years ago |
|
davor
|
7e3365c604
|
readme update
|
7 years ago |
|
davor
|
8de462036e
|
readme update
|
7 years ago |
|
davor
|
5ae86e21bc
|
readme update
|
7 years ago |
|
davor
|
9041a4f07a
|
readme update, separated document for the PCB v1.7 upgrade
|
7 years ago |
|
davor
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abccea4d9d
|
readme update
|
7 years ago |
|
davor
|
fb4fa2cd90
|
readme update
|
7 years ago |
|
davor
|
73ff0e5834
|
readme update
|
7 years ago |
|
davor
|
c76c7e9686
|
readme update
|
7 years ago |
|
davor
|
47fbd0ddbb
|
readme update
|
7 years ago |
|
davor
|
3a87d41201
|
schematics: additional comments for wifi bootstrapping and readme update
|
7 years ago |
|
davor
|
f5de9a85ed
|
schematics: connecting SHUTDOWN to FPGA
|
7 years ago |
|
davor
|
fdfc6525ea
|
readme update
|
7 years ago |
|
Emard
|
7d8b518b17
|
readme update
|
7 years ago |
|
Emard
|
2d1bec3e88
|
readme update
|
7 years ago |
|
davor
|
4664781272
|
readme update
|
7 years ago |
|
davor
|
b4c2489ad5
|
readme: SD centered and CD GND-ed
|
7 years ago |
|
Emard
|
39034db585
|
readme update
|
7 years ago |
|
davor
|
bca8107ec3
|
readme update
|
7 years ago |
|
Emard
|
2b2420fe37
|
schematics: text labels that enumerate differential pairs on 2.54mm connector
|
7 years ago |
|
Emard
|
3d2a890278
|
readme update
|
7 years ago |
|
Emard
|
1b26ce749d
|
readme update
|
7 years ago |
|
Emard
|
e6c391bc57
|
readme update
|
7 years ago |
|
davor
|
bc41b3052d
|
move WIFI disable jumper closer to BTN1
|
7 years ago |
