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@ -96,7 +96,7 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
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* \param[in] CRCCommand NVM CRC command to issue to the target
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* \param[out] CRCDest CRC Destination when read from the target
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
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{
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@ -148,7 +148,7 @@ bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
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* \param[out] ReadBuffer Buffer to store read data into
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* \param[in] ReadSize Number of bytes to read
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
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{
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@ -156,7 +156,7 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
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if (!(NVMTarget_WaitWhileNVMControllerBusy()))
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return false;
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/* Send the READNVM command to the NVM controller for reading of an aribtrary location */
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/* Send the READNVM command to the NVM controller for reading of an arbitrary location */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(NVM_CMD_READNVM);
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@ -166,9 +166,8 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
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NVMTarget_SendAddress(ReadAddress);
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/* Send the REPEAT command with the specified number of bytes to read */
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);
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PDITarget_SendByte(ReadSize & 0xFF);
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PDITarget_SendByte(ReadSize >> 8);
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
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PDITarget_SendByte(ReadSize - 1);
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/* Send a LD command with indirect access and postincrement to read out the bytes */
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PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
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@ -185,12 +184,10 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
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* \param[in] WriteBuffer Buffer to source data from
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* \param[in] WriteSize Number of bytes to write
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)
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bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer)
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{
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for (uint16_t i = 0; i < WriteSize; i++)
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{
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/* Wait until the NVM controller is no longer busy */
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if (!(NVMTarget_WaitWhileNVMControllerBusy()))
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return false;
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@ -200,11 +197,10 @@ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(WriteCommand);
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/* Send each new memory byte to the memory to the target */
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/* Send new memory byte to the memory to the target */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendAddress(WriteAddress++);
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PDITarget_SendByte(*(WriteBuffer++));
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}
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return true;
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}
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@ -219,7 +215,7 @@ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint
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* \param[in] WriteBuffer Buffer to source data from
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* \param[in] WriteSize Number of bytes to write
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,
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uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)
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@ -257,22 +253,13 @@ bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffComman
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NVMTarget_SendAddress(WriteAddress);
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/* Send the REPEAT command with the specified number of bytes to write */
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);
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PDITarget_SendByte(WriteSize & 0xFF);
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PDITarget_SendByte(WriteSize >> 8);
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
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PDITarget_SendByte(WriteSize - 1);
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/* Send a ST command with indirect access and postincrement to write the bytes */
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PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
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for (uint16_t i = 0; i < WriteSize; i++)
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PDITarget_SendByte(*(WriteBuffer++));
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// TEMP
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PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);
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GPIOR0 = PDITarget_ReceiveByte();
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if (!(GPIOR0 & (1 << 0)))
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JTAG_DEBUG_POINT();
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// END TEMP
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}
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if (PageMode & XPRG_PAGEMODE_WRITE)
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@ -300,7 +287,7 @@ bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffComman
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* \param[in] EraseCommand NVM erase command to send to the device
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* \param[in] Address Address inside the memory space to erase
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
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{
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@ -313,7 +300,7 @@ bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(EraseCommand);
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/* Chip erase is handled seperately, since it's procedure is different to other erase types */
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/* Chip erase is handled separately, since it's procedure is different to other erase types */
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if (EraseCommand == NVM_CMD_CHIPERASE)
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{
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/* Set CMDEX bit in NVM CTRLA register to start the chip erase */
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