Complete TPI protocol code to enter and exit TPI programming mode for the ATTINY 6-pin devices.

pull/1469/head
Dean Camera 15 years ago
parent 65fcebf478
commit 35dac470f2

@ -38,44 +38,35 @@
#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__) #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read.
* calculation.
* *
* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
*/ */
bool XMEGANVM_WaitWhileNVMBusBusy(void) bool TINYNVM_WaitWhileNVMBusBusy(void)
{ {
// TODO TCNT0 = 0;
TIFR0 = (1 << OCF1A);
return false;
} uint8_t TimeoutMS = TINY_NVM_BUSY_TIMEOUT_MS;
/** Waits while the target's NVM controller is busy performing an operation, exiting if the /* Poll the STATUS register to check to see if NVM access has been enabled */
* timeout period expires. while (TimeoutMS)
* {
* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise /* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */
*/ XPROGTarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG);
bool XMEGANVM_WaitWhileNVMControllerBusy(void) if (XPROGTarget_ReceiveByte() & TPI_STATUS_NVM)
{ return true;
// TODO
if (TIFR0 & (1 << OCF1A))
{
TIFR0 = (1 << OCF1A);
TimeoutMS--;
}
}
return false; return false;
} }
/** Retrieves the CRC value of the given memory space.
*
* \param[in] CRCCommand NVM CRC command to issue to the target
* \param[out] CRCDest CRC Destination when read from the target
*
* \return Boolean true if the command sequence complete successfully
*/
bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
{
// TODO
return true;
}
/** Reads memory from the target's memory spaces. /** Reads memory from the target's memory spaces.
* *
* \param[in] ReadAddress Start address to read from within the target's address space * \param[in] ReadAddress Start address to read from within the target's address space
@ -84,7 +75,7 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
* *
* \return Boolean true if the command sequence complete successfully * \return Boolean true if the command sequence complete successfully
*/ */
bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize) bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)
{ {
// TODO // TODO
@ -99,7 +90,7 @@ bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const
* *
* \return Boolean true if the command sequence complete successfully * \return Boolean true if the command sequence complete successfully
*/ */
bool XMEGANVM_WriteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer) bool TINYNVM_WriteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)
{ {
// TODO // TODO
@ -113,7 +104,7 @@ bool XMEGANVM_WriteMemory(const uint8_t WriteCommand, const uint32_t WriteAddres
* *
* \return Boolean true if the command sequence complete successfully * \return Boolean true if the command sequence complete successfully
*/ */
bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address) bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
{ {
// TODO // TODO

@ -59,10 +59,9 @@
#define TINY_NVM_BUSY_TIMEOUT_MS 100 #define TINY_NVM_BUSY_TIMEOUT_MS 100
/* Function Prototypes: */ /* Function Prototypes: */
bool TINYNVM_WaitWhileNVMControllerBusy(void); bool TINYNVM_WaitWhileNVMBusBusy(void);
bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize); bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);
bool TINYNVM_WriteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer); bool TINYNVM_WriteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);
bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address); bool TINYNVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);
bool TINYNVM_WaitWhileNVMBusBusy(void);
#endif #endif

@ -108,6 +108,7 @@
/* Function Prototypes: */ /* Function Prototypes: */
void XMEGANVM_SendNVMRegAddress(const uint8_t Register); void XMEGANVM_SendNVMRegAddress(const uint8_t Register);
void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress); void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress);
bool XMEGANVM_WaitWhileNVMBusBusy(void);
bool XMEGANVM_WaitWhileNVMControllerBusy(void); bool XMEGANVM_WaitWhileNVMControllerBusy(void);
bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest); bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);
bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize); bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);
@ -116,6 +117,5 @@
const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress, const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
const uint8_t* WriteBuffer, const uint16_t WriteSize); const uint8_t* WriteBuffer, const uint16_t WriteSize);
bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address); bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);
bool XMEGANVM_WaitWhileNVMBusBusy(void);
#endif #endif

@ -132,7 +132,13 @@ static void XPROGProtocol_EnterXPROGMode(void)
/* Enable TPI programming mode with the attached target */ /* Enable TPI programming mode with the attached target */
XPROGTarget_EnableTargetTPI(); XPROGTarget_EnableTargetTPI();
// TODO - enable NVM bus via KEY /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
XPROGTarget_SendByte(TPI_CMD_SKEY);
for (uint8_t i = sizeof(TPI_NVMENABLE_KEY); i > 0; i--)
XPROGTarget_SendByte(TPI_NVMENABLE_KEY[i - 1]);
/* Wait until the NVM bus becomes active */
NVMBusEnabled = TINYNVM_WaitWhileNVMBusBusy();
} }
Endpoint_Write_Byte(CMD_XPROG); Endpoint_Write_Byte(CMD_XPROG);
@ -159,7 +165,9 @@ static void XPROGProtocol_LeaveXPROGMode(void)
} }
else else
{ {
// TODO - Disable TPI via register /* Clear the NVMEN bit in the TPI CONTROL register to disable TPI mode */
XPROGTarget_SendByte(TPI_CMD_SSTCS | TPI_CTRL_REG);
XPROGTarget_SendByte(0x00);
XPROGTarget_DisableTargetTPI(); XPROGTarget_DisableTargetTPI();
} }

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