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@ -45,9 +45,8 @@ volatile bool IsSending;
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/** Software USART raw frame bits for transmission/reception. */
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volatile uint16_t SoftUSART_Data;
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/** Bits remaining to be sent or received via the software USART. */
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volatile uint8_t SoftUSART_BitCount;
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/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
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#define SoftUSART_BitCount GPIOR2
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/** ISR to manage the software USART when bit-banged USART mode is selected. */
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ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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@ -59,21 +58,13 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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if (!(SoftUSART_BitCount))
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return;
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/* Check to see if the current clock state is on the rising or falling edge */
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bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);
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if (IsSending && !IsRisingEdge)
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{
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if (SoftUSART_Data & 0x01)
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BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
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else
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BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
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SoftUSART_Data >>= 1;
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SoftUSART_BitCount--;
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}
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else if (!IsSending && IsRisingEdge)
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/* Check to see if we are at a rising or falling edge of the clock */
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if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
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{
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/* If at rising clock edge and we are in send mode, abort */
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if (IsSending)
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return;
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/* Wait for the start bit when receiving */
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if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
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return;
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@ -84,6 +75,20 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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SoftUSART_Data >>= 1;
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SoftUSART_BitCount--;
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}
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else
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{
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/* If at falling clock edge and we are in receive mode, abort */
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if (!IsSending)
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return;
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if (SoftUSART_Data & 0x01)
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BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
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else
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BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
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SoftUSART_Data >>= 1;
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SoftUSART_BitCount--;
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}
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}
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#endif
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@ -120,7 +125,7 @@ void PDITarget_EnableTargetPDI(void)
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asm volatile ("NOP"::);
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/* Fire timer compare ISR every 100 cycles to manage the software USART */
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OCR1A = 100;
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OCR1A = 80;
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TCCR1B = (1 << WGM12) | (1 << CS10);
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TIMSK1 = (1 << OCIE1A);
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Dean Camera
15 years ago