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@ -145,6 +145,8 @@ ISR(TIMER1_COMPB_vect, ISR_BLOCK)
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/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
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void XPROGTarget_EnableTargetPDI(void)
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{
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IsSending = false;
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Set Tx and XCK as outputs, Rx as input */
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DDRD |= (1 << 5) | (1 << 3);
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@ -160,10 +162,6 @@ void XPROGTarget_EnableTargetPDI(void)
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UBRR1 = (F_CPU / 1000000UL);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
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XPROGTarget_SendBreak();
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XPROGTarget_SendBreak();
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#else
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/* Set DATA and CLOCK lines to outputs */
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BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;
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@ -174,20 +172,22 @@ void XPROGTarget_EnableTargetPDI(void)
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asm volatile ("NOP"::);
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asm volatile ("NOP"::);
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/* Fire timer compare channel A ISR every 90 cycles to manage the software USART */
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OCR1A = 90;
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/* Fire timer compare channel A ISR to manage the software USART */
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OCR1A = BITS_BETWEEN_USART_CLOCKS;
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TCCR1B = (1 << WGM12) | (1 << CS10);
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TIMSK1 = (1 << OCIE1A);
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#endif
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/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
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/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
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XPROGTarget_SendBreak();
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XPROGTarget_SendBreak();
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#endif
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}
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/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
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void XPROGTarget_EnableTargetTPI(void)
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{
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IsSending = false;
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/* Set /RESET line low for at least 90ns to enable TPI functionality */
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RESET_LINE_DDR |= RESET_LINE_MASK;
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RESET_LINE_PORT &= ~RESET_LINE_MASK;
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@ -204,10 +204,6 @@ void XPROGTarget_EnableTargetTPI(void)
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UBRR1 = (F_CPU / 1000000UL);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
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XPROGTarget_SendBreak();
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XPROGTarget_SendBreak();
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#else
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/* Set DATA and CLOCK lines to outputs */
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BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;
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@ -216,15 +212,15 @@ void XPROGTarget_EnableTargetTPI(void)
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/* Set DATA line high for idle state */
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BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
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/* Fire timer capture channel B ISR every 90 cycles to manage the software USART */
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OCR1B = 9;
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/* Fire timer capture channel B ISR to manage the software USART */
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OCR1B = BITS_BETWEEN_USART_CLOCKS;
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TCCR1B = (1 << WGM12) | (1 << CS10);
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TIMSK1 = (1 << OCIE1B);
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#endif
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/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
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XPROGTarget_SendBreak();
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XPROGTarget_SendBreak();
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#endif
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}
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/** Disables the target's PDI interface, exits programming mode and starts the target's application. */
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