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# ULX3S PCB
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ULX3S = University digital Logic Learning Xtensible
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board release 3 with SDRAM, Successor
of [ULX2S](http://github.com/emard/ulx2s).
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3D preview
![TOP](/pic/ulx3st.jpg)
![BOTTOM](/pic/ulx3sb.jpg)
[Manual](/doc/MANUAL.md).
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This is a small (94x51 mm) standalone FPGA board
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for education, research and general purpose, with a full
featured selection of chips which I all wanted on
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a low-cost PCB, but haven't found on the market.
It's open source and open hardware because if it is
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good for our development of [f32c](http://github.com/f32c/f32c) SOC,
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it should be also good to other projects.
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ULX3S will carry all digital logic on our research, education and
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makerspace projects in next 5 years.
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ULX3S is standalone embeddable gadget with onboard display, buttons,
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storage, WiFi and compatible connectors.
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ULX3S can do things no other board can.
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ULX3S can self-reflash with a bitstream sent
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remotely from web interface over WiFi or from SD
card browsed by onboard OLED display and buttons.
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ULX3S can completely power down and wakeup from
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battery backed RTC.
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ULX3S has rich range of chips and connectivity
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required for many other open source projects:
SDRAM, USB, PS/2, SDCARD, HDMI, FLASH, RTC, I2C, OLED, AUDIO, ADC,
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onboard FM/ASK antenna 88-433.92 MHz and 56 GPIO pins which
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are all routed as differential pairs and have pinout that
is PMOD compatible.
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ULX3S is sufficiently equipped to
emulate [Amiga](https://github.com/emard/Minimig_ECS) retro
computer and run its games, but can do much more.
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[Schematics](/doc/schematics.pdf) and PCB are done in open source KiCAD 5 PCB editor:
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kicad ulx3s.pro
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# Features
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FPGA: Lattice ECP5 LFE5U-85F-6BG381C
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USB: FTDI FT231XS (300kbit JTAG and 3Mbit USB-serial)
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GPIO: 56 pins (28 differential pairs), PMOD-friendly
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RAM: 32MB SDRAM MT48LC16M16
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Flash: 4MB Quad-SPI Flash IS25LP032D for FPGA config
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Storage: Micro-SD slot
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LEDs: 11 (8 blink-LEDs, 2 USB LEDs, 1 WiFi LED)
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Buttons: 7 (4 direction, 2 fire, 1 power button)
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Audio: 3.5 mm jack with 4 contacts (analog stereo + digital audio or composite video)
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Video: GPDI connector with 3.3V-5V I2C bidirectional level shifter
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Display: placeholder for 0.96" SPI COLOR OLED
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WiFi+bluetooth: placeholder for ESP-32 (Standalone JTAG web interface over WiFi)
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ADC: 8 channels, 12 bit, 1 MSa/s MAX11125
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Power: 3 Switching voltage regulators: 1.1V, 2.5V, 3.3V
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Clock: 25 MHz onboard, external differential clock input
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Low power sleep: RTC clock wakeup, power button, 32768 Hz quartz and battery
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GPDI is General Purpose Differential Interface,
Electrically LVDS, mostly TMDS tolerant
female receptacle more-or-less compatible
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with digital monitors/TVs
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# Production
If you are going to order this project by yourself, it is important
what manufacturer to choose for PCBA (PCB and Assembly) service.
Choose PCBA manufacturer which can produce PCB of IPC CLASS 3 quality,
5/5 mil trace resolution and 0.2 mm holes.
Avoid manufacturer who claims "quality" and "satisfaction" but doesn't
really know what will be IPC CLASS rating for this project.
PCBA manufacturer prices for the parts should be approximately equal as those
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from distributors like [Mouser](http://www.mouser.com) or [DigiKey](http://www.digikey.com).
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Avoid any PCBA manufacturer who asks 3$ for the 1$ part or 40$ for the 30$ part.
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Select [Mouser](http://www.mouser.com) language/location icon to PCBA manufacturer
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country of origin and $-currency to check is PCBA manufacturer telling the truth
about prices.
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[PCBWAY](http://www.pcbway.com) produced [ULX3S v1.7 45F](/pic/ulx3sb-v17.jpg) in
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December 2017 at above of CLASS 3 quality, $126 per
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board. They produced [ULX3S v1.8 85F](/pic/ulx3sb-v18.jpg) in
May 2018. Boards look like on the edge of CLASS 1 quality acceptance
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(drill randomness and copper layer
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misaligment, [some holes have breakout near 180°](/pic/ulx3sb-v18-breakout-c19.png)),
while they claim it is still CLASS 2 compliant.
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They charged $134 per board but agree to return money. [PCBWAY](http://www.pcbway.com) is
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cheap at boards and assembly but
charged $40 for FPGA 85F chip which costed about $30 on [Mouser](http://www.mouser.com) at
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that time.
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[PCBCART](http://www.pcbcart.com) would be my next choice because they
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offer CLASS 3 quality and assembly at reasonable cost. Prices for the
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parts are equal as from [Mouser](http://www.mouser.com) so total price per
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board should be about the same as above.
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Don't pay everything at once. Following payment phases during the
PCBA production are recommended:
1. Pay for the parts
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2. Manufacturer orders the parts and optionally negotiates with you about part numbers.
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Depending on market availability, some parts may come in different physical package.
3. Send updated gerbers which fit to ordered parts.
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4. Pay for PCB
5. Manufacturer sends pictures of produced PCB for your inspection.
If anything looks suspicious, ask also for X-ray imaging.
6. Pay for the assembly and shipping.
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Nobody wants quality issues, so it is good to ask if manufacturer has qualified personnel
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able to follow instructions
for [ULX3S self-test](https://github.com/emard/ulx3s-bin) before shipping.
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# Todo
8 years ago
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Here is checklist what was done or should be done in the next PCB release.
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[x] Silkscreen Double outline for BGA chip
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[x] Silkscreen do not write over the solder pads
[x] Silkscreen JTAG signal names on 6-pin 2.54 mm header
[x] Silkscreen remove OLED outline
[x] Solder stop mask must go inbetween all SMD chip pads
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[x] External differential clock input at J1_33 +/-
[x] physically sprinkle VCC blocator capacitors under BGA
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[ ] Values on silkscreen
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[x] Dedicated antenna pin
[x] onboard 433 antenna
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[x] 433 remove GND and silkscreen test point
[x] Resistors for LEDs
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[x] Move USB LEDs from bottom to top side
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[x] Improve SDRAM routing - use VIAs for closest pins
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[x] Increase thickness of power lines (5V, 3.3V, 2.5V)
[x] Compile a f32c bitstream using the schematics
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[x] Compile differential GPDI output
[x] Connect more lines from ESP-32 to FPGA
[x] Connect FPGA USB D+/D- with 1.5k pullup in USB 1.1 (full speed) mode
[x] FPGA USB add 27 ohm + 3.6 V zener
[x] Symmetrically place USB connectors left-right
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[x] External JTAG header
[x] Move JTAG 2 mm left
[x] Move WiFi Disable jumper closer to the BTN1 (angled header)
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[x] Sprinkle 2.2uF capacitors on power lines
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[x] Spice simulation of power-up/shutdown network
[x] 27ohm D+/D- to FT231XS
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[x] DIP switch (4 switches)
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[x] MAX11123 ADC SPI
[x] I2C for RTC
[x] main usb connector on top side
[x] space screw to other parts
[x] move battery away from screw hole
[x] top layer GND fill
[x] R25 move away from oled screw hole
[x] DIP switch to the right near RAM
[x] Move HDMI a bit closer to OLED
[x] 32768Hz oscillator footprint
[x] SD card footprint SCHD3A0100
[x] center the SD footprint for T&R
[x] SD connect GND (thin pins)
[x] move USB 0.5-1mm more out
[x] DIP SW footprint correct
[x] AUDIO jack footprint fits
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[x] AUDIO jack pin 4 (ring2) connected to 4-bit DAC
[x] BTN footprint too small
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[x] SMPS jumpers default OFF for prototype testing
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[x] FPGA DONE to ESP-32
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[x] Diodes manual soldering
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[x] R56: FT231X rev A,B,C TXDEN to GND
workaround from TN140_FT231X Errata
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[x] PCB for LFE5UM ready (some GND will change to
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VCC for Serdes power supply, see LFE5U->LFE5UM
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migration docs)
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[x] Check GND/VCC for 45 and 85 packages,
for example pin T11 is NC on 25U, GND on 85U and VCC ond 85UM
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[x] Reconnect WIFI_OFF so that jumper has priority
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[x] 25MHz oscillator: needs clearance from LEDs, move under USB1
[x] connect SHUTDOWN to FPGA
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[x] ESP-32: won't boot when SD connected. Don't solder it at PCB v1.7
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It is routed differently in newer release
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Arduino->Examples->ESP32->SD_MMC_Test
https://github.com/espressif/esp-idf/blob/master/examples/storage/sd_card/README.md
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moved blue LED from GPIO2 to GPIO5
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[x] I2C resistors increased 470->2.2k
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[x] GPDI AC-coupling 100nF to each differential line.
[x] reliable shutdown (D11=RED LED, R4=4.7k)
[x] SDRAM raster back to 0.8 mm
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[x] connect SPI Flash Quad Mode (QSPI)
[x] allow powering the board without powering FTDI chip
[ ] reverse D9 at US2 to draw power from usb instead of provide it
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[x] micro USB extended pads for Handsoldering (already were extended)
[x] move 25MHz oscillator away from USB connector for handsoldering
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[x] schematics gpio J..+- pins renamed to gp/gn for easier readability
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[ ] route 16-channel ADC
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[x] move 8 LEDs a bit down and right
[x] let SD_CLK go to FPGA clock capable pin: swap SD_CLK and SD_D2 pins
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[x] additional 2 differential lines for US2
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[x] additional US2 pins for pullup 1.5k
[x] additional US2 pins for pull up-down 15k
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[x] unified US2 pullup/down: resistor-diode nework for pullup 1.5k and pulldown 15k
[x] clear silkscreen mess with Cx under FPGA
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[x] power decoupling capacitors for ESP32 and OLED
[x] Connect switching power supply jumpers
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[ ] every 1-2 seconds there are clicks at analog audio output
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[x] 3.6V zener diodes must be on FPGA side
[x] can esp32 second tx/rx port make serial communication with FPGA
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[x] Jumper to switch 2.5V/3.3V for left IO banks
[x] move usb pull from gpio bank0 to gpdi bank1
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[x] isolate each PMOD group to each io bank
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[ ] move GP7,GP8 from gpio bank0 to gpio bank7
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[x] route selected voltage to VCCio0/7
[x] route selected voltage to J1 PMOD instead of 3.3V fixed
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[x] more bank0,1,7 decoupling capacitors
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[x] Move Jumper 2.5V/3.3V deeper inside PCB (angled header)
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[x] 0R resistor placeholders to hardwire 2.5V/3.3V instead of the jumper
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[x] Selected 2.5/3.3V to J1 header (instead fixed 3.3V)
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[x] RTC battery capacitor
[x] battery + pad clearance
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[x] PCB v1.8.1 redesigned to fit HDMI 649-10029449-111RLF (the cheapest)
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[ ] use cheaper diodes 583-MM4148-T in SOD-80C package
[x] fix copper layer after using non-handsoldering resistor footprints
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[x] DIP switch must be pulled up at 2.5/3.3V or 2.5V line, not 3.3V
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[x] RTC time loss at power down fixed with 1k+22uF - see page 54 of datasheet
[x] Rotate SD card 180° for easier front loading
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